The continual demand for high performance integrated circuits in smaller chip areas has resulted in downsizing transistor dimensions and increasing operating power densities. This leads to heat dissipation problems, especially for GaAs-based circuits since GaAs has one-third the thermal conductivity of silicon. One solution to the thermal problem is a flip-chip approach where the substrate on which the circuit is fabricated is "flipped," and the circuit side is bonded directly to a heatsink/groundplane. This removes the problem of having the substrate, with its poor thermal conductivity, between the circuit and the heatsink.
Flip-chip bonding for integrated circuits allows for a higher density of interconnection with less parasitic impedances than with traditional wire bonding and tape automated bonding. In flip-chip bonding, solder bumps on the bonding pads on the frontside of a die are aligned with solder-wettable metallization on a carrier substrate, and a solder reflow forms all of the solder bonds simultaneously. In contrast to wire bonding, the flip-chip bond pads may be located anywhere on the frontside of a die and thus simplify integrated circuit layout.
One problem with the traditional flip-chip approach is that the only circuitry on the downside of the waist is in the form of active devices, e.g. transistors. Transmission lines, resistors, capacitors, bond pads and so forth are placed on the up-side of the wafer. Access between the active devices on the down-side and the passive circuitry on the up-side is provided through vias running through the thickness of the wafer. The requirement of having processing on both sides of the wafer increases wafer handling and results in a complex fabrication process.
FIG. 1 shows a typical prior an monolithic microwave integrated circuit (MMIC) 100 and shows an air bridge 102 connecting two source regions of MESFET 104 through a via 106 to ground plane 108. The circuit also includes microstrip transmission lines 110 for matching and input/output circuits. Wire bonding 112 connects to pad 114 on alumina substrate 116 which may in turn connect to a coaxial cable. The ground plane 108 typically abuts a heat sink 118, and the GaAs substrate or die 120 is typically about 100 .mu.m thick. It may be appreciated that the low thermal conductivity of the GaAs die 120 results in a high thermal impedance for devices in this configuration.
FIG. 2 shows a prior art flip-chip approach to the problem of high thermal impedance devices. Flip-chip MMIC 200 includes a MESFET 202 with airbridge 204 in direct contact with heatsink 206. MESFET 202 is fabricated on GaAs die 208. Groundplane 210 is deposited onto the surface of the wafer and airbridge plating is deposited to form a substantially planar surface with which to contact heatsink 206. The input and output to the MESFET 202 (or other active device) is taken through the die 208 by a via 212 to the top side of the die where signals are transferred off the die by wire bond 214 to a pad 216 on an alumina substrate 218, as in FIG. 1. Transmission lines 220, capacitors 222, and resistors 224 are formed on the top side of the die 208. This configuration has the disadvantage that processing is required on both sides of the semiconductor die 208. The increased wafer handling and process steps involved in this approach present a severe cost disadvantage.